Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

edge detection in verilog,. help

edge detection in verilog is easy or a very long program>? ,. can somebody help about this edge detection in verilog,. thank you,.

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    Are you trying to detect a 0->1 or 1->0 transition of a signal?

    As long as you know how to construct a circuit, it can be coded in Verilog.

    always @(posedge clk)

    signal_reg <= mysignal;

    assign rise_edge = ~signal_reg & mysignal;