During “Analysis & synthesis”, the Quartus Pro 17.1.2 Build 304 (Patch 2 installed) can’t recognize and load the right “.mif” file which is already specified in the VHDL code via the "attribute ram_init_file".

Question

I got the following message:Warning(127007): Memory Initialization File or Hexadecimal (Intel-Format) File "E:/MyProject/qdb/_compiler/top_rtl/root_partition/17.1.0/partitioned/1/mifs/ram3_generic_ram_c6a345e2.hdl.mif" contains "don't care" values -- overwriting them with 0s However, I compiled my design with other Quartus versions and everythings is OK.Any advice please to keep using Quartus pro 17.1.2 ?

joannesiny_l_intel · Answer

Hi,Can you try to work around by creating soft link from your source file and update the qsf file. The steps is mention in the link belowhttps://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/solutions/rd04032012_240.htmlIn a mean time, is this possible to share the design  for us to replicate the error above and workaround the issue as well?ThanksJoanne

lleta · Answer

Thanks Joanne for your reply.But, it still not working.Please find attached an archive of my example design.

joannesiny_l_intel · Answer

Hi,

Sorry for late reply. I am requesting the help from internal team, as suspect it is internal bug. They might need sometime to look at  it.

Btw, is this possible for you to run your design using quartus version 18.1.1 as we encourage customer to use the latest version.
Thanks
Joanne

Forum Discussion

During “Analysis & synthesis”, the Quartus Pro 17.1.2 Build 304 (Patch 2 installed) can’t recognize and load the right “.mif” file which is already specified in the VHDL code via the "attribute ram_init_file".

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