During “Analysis & synthesis”, the Quartus Pro 17.1.2 Build 304 (Patch 2 installed) can’t recognize and load the right “.mif” file which is already specified in the VHDL code via the "attribute ram_init_file".

Hi,

Can you try to work around by creating soft link from your source file and update the qsf file. The steps is mention in the link below

https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/solutions/rd04032012_240.html

In a mean time, is this possible to share the design for us to replicate the error above and workaround the issue as well?

Thanks

Joanne