Forum Discussion
Hi,
Do you check LTSSM signal and ensure the card is able to link up ?
Response- I tried capturing the LTSSM and link up signal on FPGA board after I do FLR.
The link is up and LTSSM value is 11.
Other than that, you may check the DIP switch and ensure that it is set to default setting.
Response - Can you please provide more details of the DIP switch?
If not, I would like to suggest you to regenerate a new design example in the IP catalog and see if the same.
Response- I will do it and confirm.
Regards,
Hi Wincent_Intel,
I tried regenerating the Quartus IP and there also I am seeing same behavior.
One more finding
The flr_pf_active signal - output from Avalon-Streaming PCIe is zero after doing FLR.
Please suggest is this correct behavior ?
-Regards,
Piyush