Does wrong current strength settings in pin planner can cause FPGA heating problem?

Hi,
what means heating problem for you? How much power consumption? How much overtemperature? Excessive current consumption in core or IO supply lines?

To ensure that overheating isn't caused by defective FPGA, does the supply current reduce to low values if the device is unconfigured?

Most likely cause for high power consumption is shorted output. In this case drive strength plays a role.

Another possible reason for high power consumption is running many logic cells and registers at maximum frequency.

I don't discuss trvial reasons like exceeded supply voltage.

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Hi,

"So, what are the factors which can cause the fpga heating problem?"

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There are various factors as to why FPGA power consumption gets high.

There are two types of power consumption in FPGA; 1. static power 2. dynamic power. The dynamic power consumption depends on the design running on the device. An example is if your design utilizes many logic, RAM, IOs, transceivers, and etc., your dynamic power consumption increases; therefore, heating problem might occur.

"Is it possible due to wrong current strength setting in pin planner cause the heating issue. We are using 4mA(default) setting."

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No, the current strength is NOT related to the heating issue. The current strength is to match the impedance among devices and board to maintain the system integrity.

Best regards,

Chee