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Ruturaj_D_Intel's avatar
Ruturaj_D_Intel
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6 years ago

Does Quartus supports Systemverilog export construct?

Hi, I am synthesizing Systemverilog RTL which has export construct in it and is not supported by Synplify. I wonder if any one has faced this issue and what workaround can be used. Does Quartu...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

May I know which edition of the software you are using?

According to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/po/ss-quartus-comparison.pdf, the Intel Quartus Prime Standard/Lite edition software have limited SystemVerilog language support.

May I know what export you are referring to? Could you provide an example? Besides this, you can check the SystemVerilog synthesis support for Pro edition software in https://www.intel.com/content/www/us/en/programmable/quartushelp/current/index.htm#hdl/vlog/vlog_list_sys_vlog.htm.

Thanks.

Best regards,

KhaiY

  • Ruturaj_D_Intel's avatar
    Ruturaj_D_Intel
    Icon for New Contributor rankNew Contributor
    6 years ago

    ​Hi KhaiY,

    I am actually getting error in Synplify tool as it does not support export. I have not tried the code in Quartus yet. Below is the export of package which is present in RTL.

    export cha_cms_mesh_pkg::*;

    export cha_cms_mesh_pkg::AD_ADD_ADR_LSB;

    I did check SystemVerilog synthesis support page of Quartus and it does not mention export.

    I am using Quartus Prime Pro 18.1 and want to know if export is supported by Quartus.

    Thanks,

    Ruturaj.