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PSriv8's avatar
PSriv8
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5 years ago

Do ROM and/or Lookup Tables introduce an additional delay to the overall circuit?

I want to design a circuit in which a 5-bit input In[4:0] (ranges from 0 to 31) is associated with a corresponding 3-bit output Out[2:0]. I can design this using a 8x3 Encoder in which 5 out of 8 inp...
JosafathB_Intel's avatar
JosafathB_Intel
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5 years ago

Hello PSriv8,

Thank you for contacting Intel® Memory & Storage Support.

To help you to get the proper support, and an answer to your inquiry, we will appreciate it if you can let us know the Intel® product that you need support for.

This because your case reached the Intel® Software Storage Technologies forum, and it does not seem to be related to an Intel® SSD or an Intel® RAID solution.

We will be looking forward to your reply.

Best regards.

Josh B.

Intel® Customer Support Technician

A Contingent Worker at Intel®

PSriv8's avatar
PSriv8
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5 years ago

Hi,

I am sorry but I think I have selected the wrong forum mistakenly. I am working on Cyclone IV FPGA and using Quartus software. Do I need to post my question again in FPGA forum?