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Fuad1
New Contributor
New ContributorDMA controller Intel FPGA IP
To whom it may concern, I'm planning to use the Intel DMA controller FPGA IP (Avalon DMA) in my Cyclone V design. In this DMA IP documentation (chapter 30 of the document provided by the link below)...
ShengN_altera
Super Contributor
Super ContributorHi,
As mentioned by SStrell, eop only exists in Avalon ST.
The DMA Controller Core topic in document Embedded Peripherals is general topic. Actually there're two DMA Controller, one is DMA Controller Intel FPGA IP under Basic Functions and another one is DMA Controller under Video. If check both DMA Controller Intel FPGA IP and DMA Controller details, both point to the same user guide.
The end-of-packet signal refers to DMA Controller under Video which uses Avalon ST.
Thanks,
Regards,
Sheng
