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Fuad1's avatar
Fuad1
Icon for New Contributor rankNew Contributor
1 year ago

DMA controller Intel FPGA IP

To whom it may concern, I'm planning to use the Intel DMA controller FPGA IP (Avalon DMA) in my Cyclone V design. In this DMA IP documentation (chapter 30 of the document provided by the link below)...
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sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
1 year ago

That's weird because EOP only makes sense in the context of Avalon streaming, not memory mapped. There's no parameter to use streaming instead of memory-mapped, so it's unclear what is being referred to.