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MATRIX7878's avatar
MATRIX7878
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

DisplayPort IP not seeing Synthesis option on

Hello, I am trying to generate a DisplayPort example and keep getting an error message, attached. I also am including the settings I am using for the IP. I cannot see what the error message i...
Hdl
ZH_Intel's avatar
ZH_Intel
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi Drew,

Good day.

Thank you for your reply.

Glad that you are able to see the design example. If you wish to have a TX-RX design, you may use choose either "DisplayPort SST parallel loopback without PCR" or "DisplayPort SST parallel loopback with AXIS Video Interface" design depending on your desired application.

Below is the example design user guide for your reference:

F-Tile DisplayPort Intel® FPGA IP Design Example User Guide

Hope this answer was helpful.

With that, do you still have further inquiries on this case?

Is there anything else I can help you with regards to this case?

Thank you.

Best Regards,

ZH_Intel

  • MATRIX7878's avatar
    MATRIX7878
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Hello,

    I will do that. I do not see the guide you are speaking of in the message:

    Perhaps a glitch? Assuming everything works though, I will not need any more help with this matter.

    Thank you,

    Drew