Forum Discussion
AEsqu
Contributor
ContributorDisable Quartus timing analyzer inverted clock
Hello,
Is there a way to disable the inverted clock latch analysis in quartus 20.1 for arria 10?
I had no such inverted clock analysis with the same design using Quartus 13.1 on stratix 3
, wit...
KennyT_altera
Super Contributor
Super ContributorWe can't confirm on this. As we do not do benchmark for old device e.g. Stratix III.
What you can do is open up the timing analyzer to do the comparison. It should show you all the details there.
I would suggest you attend the timing closure class as well. Look into the prerequisite before attending the timing closure class, as you might need to know on timing analyzer as well.
https://www.intel.com/content/www/us/en/programmable/support/training/course/odswtc02.html
Thanks
AEsquFinally got it timing clean (fixes hold time violation on arria 10 with quartus 20.2) using other settings,
see attached file.
