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anhnidnahp
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2 years ago

DDR3 SDRAM Controller with Uniphy intel FPGA IP 22.1 failed

Hi Intel team, Please see below for the error message when i am generating the DDR3 IP. Info: p0: "mem_if_ddr3_emif_0" instantiated altera_mem_if_ddr3_phy_core "p0" Info: m0: "mem_if_ddr3_emif_0" ...
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anhnidnahp
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2 years ago

I'm sorry, Adzim, for responding just now. However, I've tried the methods you mentioned without success. Currently, I've switched to Quartus 18.1 and turned off WSL to serve my projec