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Altera_Forum's avatar
Altera_Forum
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16 years ago

DCFIFO and DMA...

Hi,

I have a dcfifo in my design (wich is interfacing two different clocks domains...)...

I want to copy the FIFO (not in SOPC) content on an SRAM memory using the DMA (from SOPC).

Does anyone know how to do it ?

I have a look on the an473 (http://www.altera.com/literature/an/an473.pdf) (using DCFIFO for data transfer between Asynchronous Clock Domains). This AN don't explain how to do it with a DMA module.

In the DMA docs, I don't find anything about using DMA with a FIFO...

Someones suggest me the use of an "Avalon to External Bus Bridge", but this IP Block (available from university program) seems to work as an Handshake Protocol (as mentioned in the AN473)

So, is it possible to use a DMA with the Avalon to External Bus Bridge ?

How can I interface a FIFO with a memory block (SRAM) using a DMA ?

Many thanks.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    You basically have three ways I think.

    The first one would be to write your own controller that connects to both the FIFO and the SRAM. It will require some time and may be a bit difficult to do if you need to share the SRAM with other components.

    The other two ways use SOPC components:

    You can create a component that adapts the FIFO signals to an Avalon streaming source or sink. It is quite easy and just requires elementary glue logic. Then you can use a Scatter-Gather DMA to connect to that stream and do the DMA.

    For the SRAM you can use a SOPC controller.

    Then to connect the SRAM controller and the SGDMA, you can either use SOPC builder (you can design an SOPC system even if you don't use the Nios processor), or do the connection between the two components yourself. You'll have to handle the SRAM timing.