DCFIFO and DMA...

You basically have three ways I think.

The first one would be to write your own controller that connects to both the FIFO and the SRAM. It will require some time and may be a bit difficult to do if you need to share the SRAM with other components.

The other two ways use SOPC components:

You can create a component that adapts the FIFO signals to an Avalon streaming source or sink. It is quite easy and just requires elementary glue logic. Then you can use a Scatter-Gather DMA to connect to that stream and do the DMA.

For the SRAM you can use a SOPC controller.

Then to connect the SRAM controller and the SGDMA, you can either use SOPC builder (you can design an SOPC system even if you don't use the Nios processor), or do the connection between the two components yourself. You'll have to handle the SRAM timing.