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Altera_Forum's avatar
Altera_Forum
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10 years ago

Cyclone V DSP blocks

Hi,

I am using a Cyclone V board with a device with 25 DSP Blocks. Compiling the design I have a fitter error message stating design need 37 DSP blocks while just 25 are available.

I can sinthesize the design without using any DSP blocks and using only logic.

How can I set Quartus II to use the 25 DSP blocks available and then sinthesize the remaining multipliers using logic?

thanks and best regards.

Stefano

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    I've just tried to reproduce your error with a small project in a Cyclone V E A2 device, instantiating 37 multipliers. My results don't tie up with yours. During analysis & synthesis it identifies the 'need' for 37 DSP Blocks. However, once it's been through the fitter this reduces to 25 (100%) and implements the balance in logic (ALMs).

    Check these two settings:

    • Auto DSP Block Replacement - ON

    • DSP Block Balancing - Auto

    Both are under 'Settings' -> 'Compiler Settings' -> 'Advanced Settings (Synthesis)'.

    These are both the defaults. Assuming that's the case for you then I suspect some other constraint is causing Quartus issues. Copy your project to a new project, remove all the constraints and see what it does. Hopefully it'll fit as per my results. You can then start adding constraints and, hopefully, you'll end up where you want to be. Alternatively, it may end up pointing you at the constraint that causes the issue.

    Cheers,

    Alex