I've just tried to reproduce your error with a small project in a Cyclone V E A2 device, instantiating 37 multipliers. My results don't tie up with yours. During analysis & synthesis it identifies the 'need' for 37 DSP Blocks. However, once it's been through the fitter this reduces to 25 (100%) and implements the balance in logic (ALMs).
Check these two settings:
- Auto DSP Block Replacement - ON
- DSP Block Balancing - Auto
Both are under 'Settings' -> 'Compiler Settings' -> 'Advanced Settings (Synthesis)'.
These are both the defaults. Assuming that's the case for you then I suspect some other constraint is causing Quartus issues. Copy your project to a new project, remove all the constraints and see what it does. Hopefully it'll fit as per my results. You can then start adding constraints and, hopefully, you'll end up where you want to be. Alternatively, it may end up pointing you at the constraint that causes the issue.
Cheers,
Alex
Honored Contributor
