Forum Discussion
Occasional ContributorCyclone V & GTS PMA
Hi,
Regarding your inquiry on the example design, for your information, you can generate Direct PHY example design from the Direct PHY IP. You may refer to the "GTS PMA/FEC Direct PHY Intel FPGA IP Example Design" section in the GTS Transceiver PHY User Guide: Agilex 5 FPGAs and SoCs for further details.
Please feel free to let me know if you have any concern. Thank you.
Regular ContributorHi,
Just to keep you posted on the progress. I have been checking through the device datasheets on the TX and RX specs. I am currently clarifying some info with Factory and will keep you posted once received any valid data from them. Thank you.
Regular ContributorHi,
Just to keep you informed—based on a review of the datasheets for both the Cyclone V (CV) and Agilex 5 GTS transceivers, there should be no fundamental issues interfacing between the two devices. For your reference, please consult the following sections during your cross-verification:
Cyclone V Datasheet:
Transmitter Specifications for GX, GT, SX, and ST Devices
Receiver Specifications for GX, GT, SX, and ST Devices
Agilex 5 Datasheet:
Transmitter Electrical Specifications
Receiver Electrical Specifications
It’s generally recommended to use AC coupling to mitigate common-mode voltage mismatches between the devices. Additionally, I suggest performing signal integrity simulations to validate the link performance under your specific operating conditions.
Let me know if you have any concerns or need further assistance. Thank you.
