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GLees's avatar
GLees
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2 years ago

Cyclone 10GX EMIF Won't fit DDR3 X16

I'm trying to implement a X16 DDR3 EMIF in a single bank (2K) of a Cyclone 10GX220. Quartus gives me an error saying that it won't fit. There are enough pins in the bank if I omit the DM signals. I...
Hdl
GLees's avatar
GLees
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2 years ago

This is a huge limitation. I have to assign an entire 2nd bank as 1.5V in order to use just a few pins. 1.5V is not very standard for anything but DDR memory. This leaves that bank fairly useless without external level translators.

I'm beginning to regret my decision to use the Cyclone 10GX.

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    Unused I/O lanes in a bank can be used for GPIO. You're not losing the other 36 pins. EDIT: oh your concern is the voltage. You don't have any other I/O you need at 1.5.