Forum Discussion
2 Replies
- Altera_Forum
Honored Contributor
Use a syntax aware text editor. NotePad++ for windows (https://notepad-plus-plus.org/) is a good one that I use often. Supports both Verilog and VHDL syntax (as well as just about any other programming language that exists). It matches BEGIN/END blocks in Verilog, and allows you to expand/compress them by a single mouse click.
Don - Altera_Forum
Honored Contributor
If you are using Linux, Use vim (http://www.vim.org/)
Regards, Ritesh