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BBBBo15's avatar
BBBBo15
Icon for New Contributor rankNew Contributor
1 year ago

Control SRAM On DE2-115

Hi, I am trying to read and write a buffer on an FPGA, and I want to use SRAM to read and write this buffer. However, I have tried two different methods, but I still couldn't get the SRAM to correctl...
Hdl
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hello,


May I know which design that you're used to do the testing?

  • Is it you own design or Intel design example?


Do you check if the design is passing timing analysis?


Is the pin location has been assigned correctly based on the board?


Regards,

Adzim


BBBBo15's avatar
BBBBo15
Icon for New Contributor rankNew Contributor
1 year ago

Hi Adzim,

  • Is it you own design or Intel design example?

It's my own design.

Do you check if the design is passing timing analysis?

It says "Quartus Prime Timing Analyzer was successful. 0 errors, 24 warnings".

In compilation report, Timing Analyzer/ Unconstrained Paths/Summary, and ../Clock Status Summary is in red color.

sorry if i misunderstood it and Time Analyzer, i haven't use Time Analyzer yet.

Is the pin location has been assigned correctly based on the board?

yes, all pins are assigned correctly in Pin Planner

Thank you.