BBBBo15New Contributor1 year agoControl SRAM On DE2-115 Hi, I am trying to read and write a buffer on an FPGA, and I want to use SRAM to read and write this buffer. However, I have tried two different methods, but I still couldn't get the SRAM to correctl...Show Moresram_arbiter.v2 KBsram_ctrl_screenshot.png42 KBoverview.png289 KBsram_ctrl_result.png86 KBsram_arbiter_result.png88 KB
BBBBo15New Contributor1 year agoHi Adzim,Is it you own design or Intel design example?It's my own design.Do you check if the design is passing timing analysis?It says "Quartus Prime Timing Analyzer was successful. 0 errors, 24 warnings".In compilation report, Timing Analyzer/ Unconstrained Paths/Summary, and ../Clock Status Summary is in red color. sorry if i misunderstood it and Time Analyzer, i haven't use Time Analyzer yet.Is the pin location has been assigned correctly based on the board?yes, all pins are assigned correctly in Pin PlannerThank you.
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