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Altera_Forum's avatar
Altera_Forum
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13 years ago

continuous averaging using VHDL

I have a question related to VHDL programming. I want to calculate the continuous average. My example code is: process (clk, reset) begin if (reset = '1') then state<=idle; out-v...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

This device has figures for Fsclk & Fs separately.

I understand that min Fs is 50Ksps and max Fs is 200Ksps. The Fsclk has then to be fast enough for 12 bits (in fact 16 times as Fs) i.e. Fsclk(min) = .8MHz

and 3.2MHz(max).

Yet you are using Fsclk of 15KHz i.e. Fs = 15KHz/16 = .9KHz appart from violating device spec.

Am I right?