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Altera_Forum's avatar
Altera_Forum
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13 years ago

continuous averaging using VHDL

I have a question related to VHDL programming. I want to calculate the continuous average. My example code is: process (clk, reset) begin if (reset = '1') then state<=idle; out-v...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

@kaz

'done' is coming from the SPI master block indicating valid transfer. Yes I am sampling each adc sample through it.

Also as I told you before there are two outputs of ADC. i-e 'adc_a_out' and 'adc_b_out' 12 bit each. In the end I do the 'and' of both of these outputs and I have 24 bit value of ADC and then send to GUI via USB interface.