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Altera_Forum's avatar
Altera_Forum
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12 years ago

continuous averaging using VHDL

I have a question related to VHDL programming. I want to calculate the continuous average. My example code is: process (clk, reset) begin if (reset = '1') then state<=idle; out-v...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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@kaz

Another question: Why did we make the size of subtractor "sub_result" 13 bit? Can't we make it 11 bit?

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if data_in is + and last stage is - then both samples are added in effect requiring one more bit