Altera_Forum
Honored Contributor
16 years agoconsectutive read and writes
hi,
I am running software example given with nios II that prints "Hello world". It uses nios CPU, onchip memory, led pio, jtag. I have generated my own custom logic and connect to these component using SOPC and generated modelsim files. Then using Nios II it generate onchip_memory.dat file that stores instruction. I run simulation and it works properly but i want that CPU generate consecutives reads writes and busrt read write with the address that i provide not the address or read write instructions in that example. Basically i want to test my custom logic with cosecutive read write and bursts. How it can be done ? I have to generate my own intruction file or i can do it in sopc.