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ABoel
New Contributor
6 years agoCompilation freezes at 2% when compiling verilog code
Intel Quartus 18.1 Build 625 compilation freezes at 2% when code snippet below is present in the Verilog code. bgr_data[23:16]<=data_ROM[count]; I have modified the code VGA_Pattern project provi...
KhaiChein_Y_Intel
Regular Contributor
6 years agoHi,
Can you provide the design.qar for investigation?
Thanks.
Best regards,
KhaiY
- ABoel6 years ago
New Contributor
Archive has been uploaded.