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AlirezaTabesh's avatar
AlirezaTabesh
Icon for New Contributor rankNew Contributor
2 years ago

Both 400G and 200G hard IP usage simultaneously

I am trying to utilize 10 XCVRs inside an F-tile. The FPGA that I am using contains four F-tiles; however, due to some constraints, I am obligated to have all the XCVRs in one F-tile. As the PMA width for my Direct PMA IPs are 64 bits, I am using more than 16 EMIBs in my F-tile. A way that I just found is to use both 400G and 200G hard IPs to expand my access to more streams. Does anyone know a way I can do that? I have been looking up and reading user guides, and still no luck!

I am attaching the F-tile architecture user guide to this message.

Platform

2 Replies

  • ZiYing_Intel's avatar
    ZiYing_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    2 years ago

    Hi,


    Since no hear any feedback from you, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.


    Best regards,

    zying