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aakkü's avatar
aakkü
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Another sld_hub error

Hello, I am trying to use NIOS 2 processor in max10 FPGA thus I've been unsuccesful. My project includes a NIOS 2 processor with parallel I/O controlling some LEDS. This is the error I get when I t...
Ahmed_H_Intel1's avatar
Ahmed_H_Intel1
Icon for Frequent Contributor rankFrequent Contributor
7 years ago
Hi, Can you share with me the QSYS system (Screen Shot) and the top level Quartus project file (screen shot)? It seems you are doing something wrong. BTW it is recommended to start with a Golden top design or a reference design in case of using one of Intel's Dev-Kits.