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Altera_Forum
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11 years ago

ALTASMI_PARALLEL Timequest Constraints

I'm using the ALTASMI_PARALLEL megafunction in a Cyclone III design and would like to know if anyone has SDC constraints for the DCLK, SDO, SCE outputs and DATA0 input. I've had a go myself, but bein...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

# ALTASMI_PARALLEL.
#  Create clock for ALTASMI_PARALLEL constraints.
create_generated_clock 
    -name asmi_dclk 
    -source }]

From what I can see from the technology map viewer the 'dclk' pin is named 'flash_ctrl:flash_ctrl0|flash_if:flash_if0|flash_if_altasmi_parallel_f182:flash_if_altasmi_parallel_f182_component|cycloneii_asmiblock2~ALTERA_DCLK'.