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Altera_Forum's avatar
Altera_Forum
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14 years ago

74LS series in Quartus ?

Hi Everyone,

I'm just wondering if there was an already existing Library for the older 74LS series chips within Quartus? I did see the regular 7400 series within the maxplus2 library folder.

Is this something I can download or is it possibly done using VHDL? I'm new with Quartus so please bear with me.

I have a schematic that I need to enter into the Block diagram but all the components are "74LS" and I was told it has to be the LS series due to timing issues.

Any help will be appreciated.

Regards,

-Gerry

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    The existing 7400 series components are not timing equivalent with old 7400 series. FPGAs have a different place-and-route every compile, and hence the timing changes every time you compile(assuming something in the design has changed. The basic compile is deterministic). On top of that, the device and speed grade you choose will cause timing to vary. So there is no reason to have the LS devices, since timing is not guaranteed. The way users deal with their variance is enter timing constraints, i.e. this clock is running at 20ns and this I/O drives another device that is clocked by the same 20ns clock and has a Tsu of 7ns. Then place-and-route will try to meet those requirements, and static timing analysis will tell you if it did or not.

    That all being said, I imaging anything you put into a current design will be significantly faster than 74LS timing. (And being too fast can occasionally be a problem, but most issues are from being too slow.)