Occasional Contributor
ContributorHi there, I found a possible solution to this issue, please check if this applies to you:
Description
Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.2 and earlier, you might see the following error when compiling Intel® Stratix® 10 designs containing the High Bandwidth Memory (HBM2) Interface Intel® FPGA IP:
Fatal Error: Segment Violation: faulting address=0x8, PC=0x7f0d85c89714 : 0x7f0d85c89714: periph_fpp!FPP_CELL::add_link(FPP_LINK const&) + 0x4
This error might occur if the reference clocks for the HBM2 intellectual property (IP) are set as virtual pins.
Resolution
To work around this error, ensure that the reference clocks for the HBM2 IP do not have a virtual pin assignment.
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.
Occasional ContributorNo, I'm afraid this is not even close. Signal Tap.
1) open quartus. probably dont even need a project. any project, doesn't matter.
2) open Signal Tap: it looks like this. You dont need to add anything to the list.
3) In setup tab, change "Basic And" to "Basic Or".
