Why my HelloWorld program is not working in Nios V/g while working perfectly in Nios V/m?

Hi Broddo and Kian,

Thank you very much for your messages.

First of all, the problem was fixed with your help. Now, my HelloWorld program is working perfectly in Nios V/g.

Effectively, the error was in the address map of the peripheral regions. The end address of the on-chip memory is 0x0900_1fff, and the start address of the JTAG UART controller is 0x1000_1000. Then, simply picking a Peripheral Region A Size of 512 KB and a Peripheral Region A Base Address such as 0x1000_0000 allows the "Hello World from Nios V/g" message to be shown on a Nios V juart terminal. In this HelloWorld example, I keep the main memory address region at the start of the memory map, and the memory addresses of my peripherals are further down. However, I think the partition suggested by Broddo should be more efficient.

Kian, I use Quartus Prime 23.1 Standard Edition because my board (DE0-Nano) integrates a Cyclone IV FPGA. So, I used a method like this one. The warnings have not disappeared, but the processor Nios V/g is working as expected. Your suggestion implies using Quartus Prime Pro Edition, with which I cannot generate a programming SOF file for the Cyclone IV device.

Best regards,
Domingo.