Updating application in EPCS via UART

Thanks, Jake. I stumbled on boot_loader_epcs_bits_cyclone.S last night. To summarize the algorithm:

- read the config data in EPCS memory a byte at a time, starting at offset zero

- discard 0xFF for an arbitrarily long time

- if you find anything other than 0x56, this is not config data

- discard 4 bytes

- the next 4 bytes contain the config data size, but the bits are reversed on a byte basis

- the size is in bits, round up to the next byte

Once I have the config data size, I need to preserve the last EPCS erase block, so I plan on reading in the last part of the config data, prepending it to my app code, and then writing to EPCS.

We've already planned on having two sets of configuration data and application code to boot from, but thanks for the tip. We are checking CRC16 on the downloaded data before writing.

The boot source says "Quartus stores the bytes in bit reversed order". Is this true for every byte in EPCS, or just the config data length? Do I need to reverse the bits in my app code before writing?

Dan