Need to use UART with FIFO Buffer in SOPC Builder Nios II System: 1> The UART RS232 available in SOPC are without FIFO is it possible to add FIFO by modifying the same UART core 2> If not is there any other SOPC ready UART_FIFO core available as free IP 3> If not is it possible to get estimate of - LE utilization without Modem Control logic - Is it necessary to write device driver for the same - Apprx how much design time it will take to design HDL UART, device driver for a single person? Please advice asap. running short of time. Thanks in Advance

--- Quote Start --- originally posted by rau@Oct 24 2005, 09:16 AM need to use uart with fifo buffer in sopc builder nios ii system: 1> the uart rs232 available in sopc are without fifo is it possible to add fifo by modifying the same uart core 2> if not is there any other sopc ready uart_fifo core available as free ip 3> if not is it possible to get estimate of - le utilization without modem control logic - is it necessary to write device driver for the same - apprx how much design time it will take to design hdl uart, device driver for a single person? please advice asap. running short of time. thanks in advance <div align='right'><{post_snapback}> (index.php?act=findpost&pid=10542) --- quote end --- --- Quote End --- Hi i think in sopc builder when we instantiate uart we get tab which asks for fifo size as it is in built. but i don&#39;t understand why u need another fifo for a uart.anyway i don&#39;t think it may be required. prasad

--- Quote Start --- originally posted by rau+oct 24 2005, 09:16 am--><div class='quotetop'>quote (rau @ oct 24 2005, 09:16 am)</div> --- quote start --- 1> the uart rs232 available in sopc are without fifo is it possible to add fifo by modifying the same uart core[/b] --- quote end --- that uart&#39;s code is generated on-the-fly by the sopc builder, so you could modify it, but it would be tricky, and you&#39;d have to figure out a way to keep your changes from being overwritten when the sopc gets regenerated. good luck there. --- quote start --- originally posted by rau@oct 24 2005, 09:16 am 2> if not is there any other sopc ready uart_fifo core available as free ip --- quote end --- not that i&#39;m aware of. there are free cores, and cores that integrate with sopc builder, but not both. --- quote start --- originally posted by rau@oct 24 2005, 09:16 am 3> if not is it possible to get estimate of - le utilization without modem control logic --- quote end --- usually the ip data sheet gives some clue to this. --- quote start --- originally posted by rau@oct 24 2005, 09:16 am - is it necessary to write device driver for the same --- quote end --- maybe. assume it&#39;s going to need a driver unless you can find one out there already. --- quote start --- originally posted by rau@oct 24 2005, 09:16 am - apprx how much design time it will take to design hdl uart, device driver for a single person? --- quote end --- a while. this depends on many unmeasurable factors, so i couldn&#39;t give you a number. but it won&#39;t be easy. <!--quotebegin-prasad_forums@Oct 26 2005, 01:03 AM i think in sopc builder when we instantiate uart we get tab which asks for fifo size as it is in built. <div align='right'><{post_snapback}> (index.php?act=findpost&pid=10579) --- quote end --- --- Quote End --- Really? I&#39;ve never seen that. However, I&#39;ve only used the Nios2 Altera UART, not any other core. Maybe you&#39;re thinking of the JTAG UART?

Hallo rau, there is a free UART16550 core from OpenCores that can simply be implemented in a NIOS design and it is also not that problem to implement it into the SOPC Builder. All you have to do is to import the top level design file into the SOPC builder using the "Create new component feature" or to write your own bus wrapper to connect the WISHBONE bus to the AVALON. You will find this core here: opencores uart16550 (http://www.opencores.com/projects.cgi/web/uart16550/overview) More work has to be done to write some driver software for it. The register structure of this UART is also really simple so that it should only take a short time to bring something up to work. Best regards... Mschulz.

There is a uart with fifo which Altera sent me when I was having troubles with the standard uart speed. The file is ACF2002.zip which I am sure you can ask for from the service request people. You need unzip it and add this whole directory to this location: <NiosII Installation Path>/components/. Then you can reopen the SOPC Builder to add this UART with fifo. It comes up as "cal uart". Good luck Ed

dear Edmund, Could you give the file ,thanks ,my email:nwpu_zhfeng@126.com

UART with FIFO Buffer | Altera Community

27 Replies

Altera_Forum
Honored Contributor
15 years ago
Hi,

does this IP still exist ? where can i find it ?

thanks.
Altera_Forum
Honored Contributor
15 years ago
If you need an UART with buffers, you can try YANU Uart from opencores. Its interface is compliant to Altera Avalon Interfaces and, as I remember, is supported in U-Boot (if you need a bootloader, too).
Altera_Forum
Honored Contributor
15 years ago
thanks ! I was searching the altera one for the sopc compatibility but yanu ip seems to have the same purpose. I will try it as soon as possible.
Altera_Forum
Honored Contributor
15 years ago
I use this IP instead :
http://www.alterawiki.com/wiki/fifoed_avalon_uart
it is based on altera_avalon_uart and is sopc ready. very fast to implement !!
Altera_Forum
Honored Contributor
12 years ago
Hi

I'm having issues with the fifoed avalon uart; I think it is a software issue but I am not sure.
I previously posted here
http://www.alteraforum.com/forum/sho...721#post181721

thanks.
Altera_Forum
Honored Contributor
12 years ago
Hey fates would you mind explaining how you got it to work?

I'm not having much luck with my own attempts.

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UART with FIFO Buffer

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