Forum Discussion
28 Replies
- Altera_Forum
Honored Contributor
your problem will be
altera uart has no fifo buffer 921 kbit/s, that means (start bit+8 data bit + stopbit) ~ 92000 byte/s -> ~ every 10us will a receive interrupt be triggered and must be handled before the next character arrives. if any other interrupt in your system will run longer than 10us and you do not work with nested interrupts, which is not quite simple, then you will loose characters. i think it's hard to get 115kbaud working, if you have other interrupts running. if you use e.g. opencores uart with fifo, the uart can receive 14 characters until receive interrupt is triggert, this are ~140 us at 921 kbit/s. you can run the uart at 921kbit/s, but if you get a continuous data stream, you cannot handle this datastream with the altera uart. - Altera_Forum
Honored Contributor
Is there any free UART opencore which has a fifo inside??
- Altera_Forum
Honored Contributor
TO_BE_DONE
- Altera_Forum
Honored Contributor
fischer :
Thanks. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif You help me understanding better real time problems due to IT. Uart with Fifo seems to be the best way to resolve it. After that, I think rewriting the handler to put bytes directly in memory is better than using standard lib overhead. david cai : Try opencores (http://www.opencores.org/)http://www.opencores.org/ karsten : Thx for your example, I'll see how it suits my design. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/rolleyes.gif - Altera_Forum
Honored Contributor
Kira,
I do it like this: # include "system.h"# include "alt_types.h"# include "sys/alt_irq.h"# include "altera_avalon_uart_regs.h" void serial_init(unsigned int baud) { /* inhibit all UART IRQ sources */ IOWR(UART_1_BASE, 3, 0x00); /* set Baud rate */ IOWR(UART_1_BASE, 4, baud); /* flush any characters sitting in the holding register */ IORD(UART_1_BASE, 0); IORD(UART_1_BASE, 0); /* reset most of the status register bits */ IOWR(UART_1_BASE, 2, 0x00); /* install IRQ service routine */ alt_irq_register(UART_1_IRQ, 0, serial_irq_0); /* enable irq for Rx. */ IOWR(UART_1_BASE, 3, 0x0080); } static void serial_irq_0(void* context, alt_u32 id) { unsigned int stat, chr; /* get serial status */ stat = IORD(UART_1_BASE, 2); /* character Rx */ if (stat & 0x0080) { chr = IORD(UART_1_BASE, 0); } } Banx. - Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by fischer@Aug 11 2006, 12:36 PM your problem will bealtera uart has no fifo buffer
921 kbit/s, that means (start bit+8 data bit + stopbit)
~ 92000 byte/s ->
~ every 10us will a receive interrupt be triggered and must
be handled before the next character arrives.
if any other interrupt in your system will run longer than 10us and you
do not work with nested interrupts, which is not quite simple,
then you will loose characters.
i think it's hard to get 115kbaud working, if you have other
interrupts running.
if you use e.g. opencores uart with fifo, the uart can receive 14 characters
until receive interrupt is triggert, this are ~140 us at 921 kbit/s.
you can run the uart at 921kbit/s, but if you get a continuous data stream,
you cannot handle this datastream with the altera uart.
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--- Quote End --- An Avalon UART with FIFO based on Altera Uart and available on SOPC builder : http://www.niosforum.com/pages/project_det...p_id=89&t_id=18 (http://www.niosforum.com/pages/project_details.php?p_id=89&t_id=18) It works for good reception without loosing char.. I still have some pb to send char at max speed 921Kbds : for instance I got only 8000 Byte/s with too very simple code :
fd = open(uart, O_RDWR | O_NONBLOCK); while (1) { write(fd,(usigned char*)string,lenght); } - Altera_Forum
Honored Contributor
thanks for the info,
perhaps Altera can make an official support for a uart with fifos, otherwise you always have to change the eviroment with new nios releases. I also prefer components written in pure vhdl or verilog, I have no knowledge about perl. Is the perl interface documented ? will the perl module continue to work if Altera changes something ? - Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by fischer@Aug 23 2006, 01:14 PM is the perl interface documented ?will the perl module continue to work if altera changes something ?
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=17782)
--- quote end ---
--- Quote End --- Sorry, I don't know.. maybe ask to 'longshot (http://forum.niosforum.com/forum/index.php?showuser=20) ' or post here (http://forum.niosforum.com/forum/index.php?showtopic=4120). I think everything is in the project doc, so no doc for perl way of design.. It's a great feature to choose Fifo lenght and misc options with SOPC, and perl allows that. The difference between altera_avalon_uart is that read() and write() functions doesn't return the number of char send or receive, but always 0. Exceptions you could find in standard uart are driven according to FIFO states.