UART interrupt handler

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originally posted by fischer@Aug 11 2006, 12:36 PM

your problem will be

altera uart has no fifo buffer

921 kbit/s, that means (start bit+8 data bit + stopbit)

~ 92000 byte/s ->

~ every 10us will a receive interrupt be triggered and must

be handled before the next character arrives.

if any other interrupt in your system will run longer than 10us and you

do not work with nested interrupts, which is not quite simple,

then you will loose characters.

i think it's hard to get 115kbaud working, if you have other

interrupts running.

if you use e.g. opencores uart with fifo, the uart can receive 14 characters

until receive interrupt is triggert, this are ~140 us at 921 kbit/s.

you can run the uart at 921kbit/s, but if you get a continuous data stream,

you cannot handle this datastream with the altera uart.

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An Avalon UART with FIFO based on Altera Uart and available on SOPC builder :

http://www.niosforum.com/pages/project_det...p_id=89&t_id=18 (http://www.niosforum.com/pages/project_details.php?p_id=89&t_id=18)

It works for good reception without loosing char..

I still have some pb to send char at max speed 921Kbds : for instance I got only 8000 Byte/s with too very simple code :

fd = open(uart, O_RDWR | O_NONBLOCK);
while (1)
{
     write(fd,(usigned char*)string,lenght);
}