the MAX® CPLD EPM7064 configuration controller

Hello SUN2004,

If I understand the schematic of the NIOS-EVALKIT-1C12 correctly the CPLD (EPM7064) is not for getting configuration data out of the flash to config the FPGA. The CPLD is used in conjunction with the USB (FTDI) to act like a USB-Blaster Cable. I think there is no possibility to store your configuration data on the board.

BTW: I’m using an EPM3128 as a configuration controller. The MAX3000 series is cheaper than the MAX7000 and has enough features for doing this job.

Bye,

niosIIuser

niosIIuser,

You are correct about the CPLD's purpose on the eval board, but actually the 1c12 eval kits have an EPCS serial flash that can be used to store hardware and software.. the boards power-up with a factory design that boots uClinux (and the linux software/file system resides in parallel flash).

SUN2004,

I believe the only reason for one device being larger than the other was because our config controller design was a tight fit on the 7064, and when Stratix came along (larger configuration size, more address pins to drive), we opted to upgrade to the next larger device to avoid any no-fit issues. I may be incorrect on this but that is what I remember.

Hello,

I have some idea and say something about CPLD configuration. Please check my idea.

We have CPLD as flash configuration device, so we can download the data(such as user app or OS ) to flash directly from the JTAG on CPLD. Yes??

If we have no CPLD, we can use uart to download. I do not know Other method to download to flash clearly.

Can some guys give me detailed info about it? And I want to know how many methods can be used to download and the implementation of each.

Thank you.

LiangYi

liangyi

All your idea is Altera remote update feature. IMHO The wery correct way to program flash is to use Nios(II) CPU and special communication program for it to communicate with host PC.

Hi MacShiz,

Yes. I know what you said.

Here I mean that If I have no CPLD configuration device, can I download app or OS to flash by using JTAG on FPGA?

Thanks.

LiangYi

It seemd to me when you use Altera Flash Programmer it programms any kind of content to CFI flash wia JTAG without configuration CPLD. It uploads special design to FPGA via JATG also to programm flash.