Hello,
some sample code without comments,
it talkes to a dsp via spi interface, NIOS is MASTER and DSP is
slave
perhaps it helps
...# include"global.h"# include"system.h"# include"hw_base.h"
# include <unistd.h>
# include"dspctrl_spi.h"
# define INTWORD_DELAY 10
/*
void dsp_write16(WORD *data,WORD len) {
IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(SPI_0_BASE,BIT0);
IOWR_ALTERA_AVALON_SPI_CONTROL(SPI_0_BASE, ALTERA_AVALON_SPI_CONTROL_SSO_MSK);
// spi_write_16(SPI_0_BASE,data,len);
IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(SPI_0_BASE,BIT0);
IOWR_ALTERA_AVALON_SPI_CONTROL(SPI_0_BASE,0);
}
*/
# define SLAVE0 0# define HREGSIZE 32
//############################################################################
void dsp_write_reg(BYTE reg,WORD data) {
WORD tempdata[2];
tempdata[0]=CMD_FIRSTBYTE | (reg&(HREGSIZE-1));
tempdata[1]=data&~CMD_FIRSTBYTE;
// spi_write_16(base,tempdata[0]);
// spi_write_16(base,tempdata[1]);
spi_write_block(SPI_0_BASE,SLAVE0,tempdata,2);
spi_wait_TRDY(SPI_0_BASE);
}
//############################################################################
WORD dsp_read_reg(BYTE reg) {
WORD tempdata[2];
// dsp checks first byte and knows then that he has to put some data on the bus
tempdata[0]= CMD_FIRSTBYTE | CMD_READ | (reg&(HREGSIZE-1));
spi_write_block(SPI_0_BASE,SLAVE0,tempdata,1);
// spi_write_16(base,tempdata[0]);
spi_read_block(SPI_0_BASE,SLAVE0,tempdata,1);
return tempdata[0];
}
//############################################################################
void spi_write_block(DWORD base,BYTE slave,WORD *data,DWORD len) {
DWORD i;
for(i=0;i<len;i++) {
spi_select_slave(base,slave);
spi_write_16(base,(*data++));
spi_deselect_slave(base,slave);
usleep(INTWORD_DELAY);
}
}
//############################################################################
void spi_read_block(DWORD base,BYTE slave,WORD *data,WORD len) {
WORD i;
for(i=0;i<len;i++) {
spi_select_slave(base,slave);
*data++=spi_read_16(base);
spi_deselect_slave(base,slave);
usleep(INTWORD_DELAY);
}
}
//############################################################################
void spi_select_slave(DWORD base,DWORD slave) {
IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(base, 1 << slave);
// Set the SSO bit (force chipselect)
IOWR_ALTERA_AVALON_SPI_CONTROL(base, ALTERA_AVALON_SPI_CONTROL_SSO_MSK);
}
//############################################################################
void spi_deselect_slave(DWORD base,DWORD slave) {
IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(base, 1 << slave);
// reset the SSO bit (force chipselect)
IOWR_ALTERA_AVALON_SPI_CONTROL(base,0);
}
//############################################################################
void spi_write_16(DWORD base,WORD data) {
DWORD status;
do {
status = IORD_ALTERA_AVALON_SPI_STATUS(base);
} while ((status & ALTERA_AVALON_SPI_STATUS_TRDY_MSK) == 0);
IOWR_ALTERA_AVALON_SPI_TXDATA(base,data);
}
//############################################################################
WORD spi_read_16(DWORD base) {
DWORD status;
WORD data;
IORD_ALTERA_AVALON_SPI_RXDATA(base);
IOWR_ALTERA_AVALON_SPI_TXDATA(base,0x00);
do {
status = IORD_ALTERA_AVALON_SPI_STATUS(base);
} while ((status & ALTERA_AVALON_SPI_STATUS_RRDY_MSK) == 0);
data=IORD_ALTERA_AVALON_SPI_RXDATA(base);
return data;
}
/*
void spi_write_16(DWORD base,BYTE slave,WORD *data,DWORD len) {
DWORD i;
DWORD status;
IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(base, 1 << slave);
for(i=0;i<len;i++) {
// select slave
IOWR_ALTERA_AVALON_SPI_CONTROL(base, ALTERA_AVALON_SPI_CONTROL_SSO_MSK);
do {
status = IORD_ALTERA_AVALON_SPI_STATUS(base);
} while ((status & ALTERA_AVALON_SPI_STATUS_TRDY_MSK) == 0);
// deselect slave
IOWR_ALTERA_AVALON_SPI_CONTROL(base, 0);
IOWR_ALTERA_AVALON_SPI_TXDATA(base,*data++);
}
while ((status & ALTERA_AVALON_SPI_STATUS_TRDY_MSK) == 0);
}
*/
void spi_wait_TRDY(DWORD base) {
DWORD status;
do {
status = IORD_ALTERA_AVALON_SPI_STATUS(base);
} while ((status & ALTERA_AVALON_SPI_STATUS_TRDY_MSK) == 0);
}