SOPC builder

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When I use the signal address, how can I know what will be those addresses, knowing that in SOPC builder, there are no adresses pre-assigned (as it is a master).[/b]

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I&#39;ve built an Avalon Master too and i had the same problem. To solve it, i&#39;ve built also an Avalon slave port in my peripheral: in this way, Nios processor could inizialize some registers of the peripheral to set the correct address for the avalon master port.

The waitrequest is automatically sent by the avalon bus each time that the peripheral has to wait, as you said. Your Avalon master port have only to manage correctly this waitrequest.

Hello,

I&#39;ve found this example, for those for want also to make a master peripheral.

memory filler (http://www.niosforum.com/forum/index.php?act=st&f=15&t=508&hl=master)

I hope that I will be soon able to give you my master peripheral http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/wink.gif

Bye.

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I&#39;ve built an Avalon Master too and i had the same problem. To solve it, i&#39;ve built also an Avalon slave port in my peripheral: in this way, Nios processor could inizialize some registers of the peripheral to set the correct address for the avalon master port.[/b]

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Hello Soin,

When you told me that you created both a master and a slave in your peripheral, did you mean in the same UIL?

Because in this case, I don&#39;t see how to make correspond registers of the two interfaces.

Thank you.

Romain.

Hi Nofi,

UIL is User Interface Logic? If so you are using the old SOPC utility made for Nios I. Instead now u have "Create new component" for Nios II, a utility that allows you to define an interface to your logic and so on. In this case, u can define as much avalon interface (master or slave) as u want, for the same peripheral.

Hi,

Yes I mean User Interface Logic when I say UIL. SO thaznk you very much for the answer, I didn&#39;t know anything about this utility.

Do you know wether in this case, I&#39;m obliged to use an avaloin clock ,or can I use the clock of my off-chip peripheral?

Hi Nofi,

for tha avalon master port you are obliged to use an avalon clock input (you will receive an error message from the "Create new component" interface"). For the avalon slave port there are no error messages, but in my peripheral i&#39;ve used avalon input clock for both master and slave...and it works...

ok, the problem is that my peripheral and Avalon don&#39;t have the same clock.

I think I will change the clock of the avalon then.

Thank you again!

Hi all,

Finally, we decided to make something as simple as possible, and to compensate with the power of the NIOS II.

Is it possible to use only export signals? The data from my sensor would go into a register.

Then in the NIOS IDE, I would read registers (registre_ecriture) thanks to IORD.

How can I know the addresses of my registers?

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LIBRARY ieee;

USE ieee.std_logic_1164.ALL;

USE ieee.numeric_std.ALL;

entity juste_le_slave is

port (

--entrées externes

data : in std_logic_vector(7 downto 0); --export, data from the sensor

vsyn : in std_logic; --export

pclk : in std_logic; --export

href : in std_logic; --export

read : in std_logic; --avalon

readdata : out std_logic_vector(7 downto 0) --avalon

);

end;

architecture a of juste_le_slave is

signal registre_ecriture : std_logic_vector(7 downto 0);

signal registre_controle : std_logic_vector(7 downto 0);

begin

process(pclk)

begin

if(pclk&#39;event AND pclk=&#39;1&#39; AND read=&#39;1&#39;) then

if (href=&#39;1&#39;) then

if (registre_controle="00000000") then

registre_controle<="11111111";

end if;

registre_ecriture<=data;

else if(vsyn=&#39;1&#39;) then

registre_controle<="00000000";

end if;

end if;

end if;

if (registre_controle="0000000") then readdata<=registre_controle;

else readdata<=registre_ecriture;

end if;

end process;

end a;[/b]

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Hello,

Has anyone already seen those errors, when building a project:

*** [obj/alt_sys_init.o] Error 1

*** [system_project] Error 2

error: &#39;ALT_IRQ_NOT_CONNECTED&#39; undeclared (first use in this function)[system_description/alt_sys_init.c]

error: (Each undeclared identifier is reported only once[system_description/alt_sys_init.c]

It appears when I compile this code:

#include <stddef.h># include “sys/alt_dma.h”# include <stdio.h># include <stdlib.h># include “alt_types.h”
/* flag used to indicate the transaction is complete */
volatile int dma_complete = 0;
/* function that is called when the transaction completes */
void dma_done (void* handle, void* data)
{
dma_complete = 1;
}
int main (void)
{
alt_u8 buffer;
alt_dma_rxchan rx;
/* Obtain a handle for the device */
if ((rx = alt_dma_rxchan_open (“/dev/dma”)) == NULL)
{
printf (“Error: failed to open device\n”);
exit (1);
}
else
{
/* Post the receive request */
if (alt_dma_rxchan_prepare (rx, buffer, 326688, dma_done, NULL)< 0)
{
printf (“Error: failed to post receive request\n”);
exit (1);
}
alt_dma_rxchan_ioctl(rx, ALT_DMA_SET_MODE_8, NULL);
alt_dma_rxchan_ioctl(rx, ALT_DMA_RX_STREAM_ON, (void*) INTERFACE_BASE);
dma_complete = 0;
/* Wait for the transaction to complete */
while (!dma_complete);
printf (“Transaction complete\n”);
alt_dma_rxchan_close (rx);
}
return 0;
}

Hi Nofi,

I think you haven&#39;t connected the DMA interupt in SOPC. Use System->Auto-assign irqs tab in SOPC...