Hello, I began my project and now I begin to understand all the advantages of the NIOS. I have to plug a CMOS video sensor to my NIOS II evaluation board. Would it be better for me to use the SOPC builder to decalre this new component. Or do I have to connect it myself with the hardware already created by the SOPC (PIO, CPU + SDRAM)? Do you have any advice for me to plug the camera? Thank You. Romain.

Hi Nofi, That is a difficult question to answer without knowing more about your camera/peripheral. Does it have any sort of standard-looking bus interface pins (read/write/address/data)? Is the timing for the peripheral constant for each access or can it vary? Does it have internal memory or is a collection of registers where you repeatedly read a data register to get the images? These will affect whether the best way to hook it up is merely with the component editor and some avalon signals going directly to it (simple), or whether you&#39;ll need to design some interface logic (more complex) and then make that a SOPC Builder component, or whether to use a very simple architecture like a collection of PIOs as you mention (very easy, but slow). These sorts of things will infuence the best way to hook it up.. please let us know more about it .

Hi Jesse, So I tell you more about this peripheral: it has a 8 bits output, and for the timings, I have to use bits like HREF (for the horizontal timing) and VSYN (for the vertical). The output is in fact a continuous stream of 8 bits. The timing is always the same, and those signals and are all dependant of a Pixel Clock signal. The chip as no memory, that&#39;s why we chose to use the SDRAM available on the evaluation board. In this case, do I have to design the device first, for example, to manage the HREF and VSYN signals? Or are there components that I could use and modify directly? And for an eventual design, would you prefer a Verilog HDL or a VHDL file? Thank you, Regards.

Hello again, Where can I find all the functions to code on the DMA? To create a stream, to access the memory, etc... Thank you. Romain.

Hello, How can I divide a clock in C? Is that possible? Or do I need only to make a temporisation? Thank you.

Software only based clock division is not preferable (you won&#39;t have a clean clock). Instead I would create a hardware based clock divider that you can program with software (usually you program period in terms of input clock cycles).

SOPC builder | Altera Community

23 Replies

Altera_Forum
Honored Contributor
20 years ago
Hello Soin,

Yes, I had done it, so this is not the problem.
Anyway, thank you for your answer.

I've read that the alt_sys_init.c was created automatically, so I don't understand the problem...
Altera_Forum
Honored Contributor
19 years ago
Hi.
I'd like to know more about this example..but the link doesn't function.

http://www.niosforum.com/forum/index.php?a...=st&f=17&t=1503 (http://www.niosforum.com/forum/index.php?a...=st&f=17&t=1503)

I'm trying to connect a CMOS camera to an altera development board (Cyclone II FPGA EP2C35).
It's a 1/4''CMOS C3088 Omnivision sensor made camera.
I'd like to know how to create VHDL file and how manage this new component.
Is DMA the right way?

Please,contact me as soon as possible

Thank you Paolo
Altera_Forum
Honored Contributor
19 years ago
Hi.
Can you explain me more about your code?
Well, it's used for interfacing a camere,am i wrong?

I have to interface a CMOS C3088 camera to Altera Development Board(Cyclone II FPGA EP2C35).

Is it enough use your VHDL file for create it in SOPC builder? How can i manage it in Nios II?

I hope you are still in this forum 'cause it's a last year post http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/unsure.gif

Thank you
Paolo

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SOPC builder

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