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dim1
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5 hours ago

Run-time errors using EMIF in Agilex 5 NIOS-V design

Hello, I am using Quartus Prime Pro 26.1.1, with the Agilex 5 development board (AXE5-Eagle). I am trying to run the NIOS-V code from the LPDDR4 memory, using JTAG to download/debug. The reset and e...
Nios Architecture
Nios Cpu
dim1's avatar
dim1
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1 hour ago

I did notice that s0_axi4_ctrl_ready was not used. Attached is an updated design where the s0_axi4_ctrl_ready is connected to the NIOS-V reset, to keep NIOS-V in reset until the EMIF is ready. It did not change anything - still the same problem.