Question about interfacing 8 bit Custom components to Nios II bus.

New to Nios development.

SW ver. Nios II SW Build Tools for Eclipse, Service pk 1

I am working with a Nios II Standard core system with On-chip mem. I have a custom component with 8 bit wide addressable registers (NO byte-enable). The component was built with a standard Avalon slave interface (10-bit address bus, 8-bit Readdata, 8-bit Writedata, chipselect and write / read strobe signals.

It appears that there are two common ways to write and read to addressable components using HAL drivers (io.h file). One method is native and the other is dynamic. In the dynamic mehtod there is also the options for 8direct, 16 direct and 32 direct reads/writes. I used the 8direct option feeling that that was a logical choice for 8-bit data length. I have tried to set up my custom component driver using both methods. In both cases the system always reads 32 bits at a time. Writes would work. When I code a read, from say register 0, I get strobes and addresses for 4 bytes. However only the the first byte is valid. when I try to read registers 1,2 and 3 (directly) they are return invalid data (Probably because the system associates these locations with reg 0).

I change my component to space registers addresses by 4 bytes. This will work for this component. However I will have other components with successive register reads (all need to be byte length).

Is my problem resolved with byte-enable inclusion in my component? Or is there some other way of doing up a component driver to address this?

Thanks,

dgreen