Qsys error

I think it is fairly explanatory really.

To elaborate: "There is an 'Error' which is caused because in the system 'System' there is a component 'External_Clocks" which has an interface called 'avalon_clocks_slave' which is required to have an associated reset signal".

So find the component named External_Clocks, which seems to be something you have made (is that correct?). On that component there is the interface mentioned. That is of type Avalon-MM Slave. As per the spec, Avalon-MM interfaces need a reset signal, but you haven't got one. So you need to add a reset signal and associate it with the Avalon-MM slave.

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I think it is fairly explanatory really.

To elaborate: "There is an 'Error' which is caused because in the system 'System' there is a component 'External_Clocks" which has an interface called 'avalon_clocks_slave' which is required to have an associated reset signal".

So find the component named External_Clocks, which seems to be something you have made (is that correct?). On that component there is the interface mentioned. That is of type Avalon-MM Slave. As per the spec, Avalon-MM interfaces need a reset signal, but you haven't got one. So you need to add a reset signal and associate it with the Avalon-MM slave.

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This component was already there , i didnt made it , when open the qsys file it shows me the following signals on External_Clocks :

clk_in_primary

sys_clk

avalon_clocks_slave

sdram_clk

clk_in_secondary

audio_clk

vga_clk

There is no reset signal , i can create one as it being pulled from a ready made cores ????

Just to add

clk_in_primary <-- input from clk

sys_clk <-- clock output

avalon_clocks_slave <-- input from data_master

sdram_clk <-- not connected

clk_in_secondary <-- input from clk_27

audio_clk <-- not connected

vga_clk <-- output going to VGA controller and VGA_Dual_Clock_Fifo

https://www.alteraforum.com/forum/attachment.php?attachmentid=11215

I am not that familiar with the External_Clocks module that is instantiated in the Qsys system. I don't think they come with Qsys library but rather that comes together with the DE Quartus project. You need to find the hw.tcl file in your local directory. Try to find the avalon_clock_slave and set the proper reset association. Something like:

set_interface_property avalon_clock_slave "associatedReset" "reset"

The "reset" is replaceable by the reset interface being declared in the hw.tcl.