Altera_Forum
Honored Contributor
Honored Contributorprovided SPL prevents Linux from booting
Hello all,
I'm attempting to do some work at the SPL/U-Boot level, and am finding that when replacing the SPL preloader, it boots U-Boot OK, but when U-Boot passes control to zImage, it hangs. My environment is: DE1-SoC, rev F "Linux console" micro-SD card image from Terasic site Nothing loaded to the FPGA. Without any changes to that, everything boots fine, all the way to a Linux login prompt. I'll call that SPL, spl1. Since I need to develop around SPL, I tried replacing the SPL on the SD card with another I could rebuild from Terasic. That code is from their "DE1-SoC CD-ROM (rev.F Board)", in .../Demonstrations/SOC_FPGA/de1_soc_GHRD/software/spl_bsp/ There is a prebuilt image there, preloader-mkpimage.bin (I'll call spl2). That boots through to the original U-Boot, but when trying to get to Linux, it hangs with:U-Boot SPL 2013.01.01 (Dec 20 2017 - 19:24:06) BOARD : Altera SOCFPGA Cyclone V Board CLOCK: EOSC1 clock 25000 KHz CLOCK: EOSC2 clock 25000 KHz CLOCK: F2S_SDR_REF clock 0 KHz CLOCK: F2S_PER_REF clock 0 KHz CLOCK: MPU clock 800 MHz CLOCK: DDR clock 400 MHz CLOCK: UART clock 100000 KHz CLOCK: MMC clock 50000 KHz CLOCK: QSPI clock 400000 KHz RESET: COLD INFO : Watchdog enabled SDRAM: Initializing MMR registers SDRAM: Calibrating PHY SEQ.C: Preparing to start memory calibration SEQ.C: CALIBRATION PASSED SDRAM: 1024 MiB ALTERA DWMMC: 0 U-Boot 2013.01.01 (Oct 24 2013 - 17:40:22) CPU : Altera SOCFPGA Platform BOARD : Altera SOCFPGA Cyclone V Board DRAM: 1 GiB MMC: ALTERA DWMMC: 0 In: serial Out: serial Err: serial Net: mii0 Warning: failed to set MAC address Hit any key to stop autoboot: 0 reading u-boot.scr ** Unable to read file u-boot.scr ** Optional boot script not found. Continuing to boot normally reading zImage 3809104 bytes read in 338 ms (10.7 MiB/s) reading socfpga.dtb 18033 bytes read in 7 ms (2.5 MiB/s) fpgaintf ffd08028: 00000000 .... fpga2sdram ffc25080: 00000000 .... axibridge ffd0501c: 00000000 ....# # Flattened Device Tree blob at 00000100 Booting using the fdt blob at 0x00000100 Loading Device Tree to 03ff8000, end 03fff670 ... OK Starting kernel ... (and that's where it hangs) I also tried rebuilding the SPL from that directory. That spl3 had the same result. I tried using the DS-5/Eclipse debugger to see what was going on. I don't have symbols for that kernel AFAIK. When stopping execution, I could see some activity. However, if I let it run for another second, then I can no longer stop it. I get the error:ERROR(TAD9-NAL30): ! Unable to stop device Cortex-A9_0 ! Cannot stop target. SPL3 is the point where I really need to be, so I can make source changes there. Any advice on clearing this up would be a huge help. Thanks, -- Tom
