Forum Discussion
23 Replies
- Altera_Forum
Honored Contributor
Your c code looks correct. I think there should be some problem in your custom component register interface logic.
Would you provide that logic? Or You can verify using NIOS II Modelsim.You can also use signal tap and check whether data is written into your custom component register or not. - Altera_Forum
Honored Contributor
Hi, the code look like:
always @(posedge csi_clk or posedge rsi_reset_n) begin // To read if (rsi_reset_n) begin end else if (avs_s0_read) begin avs_s0_readdata = START; end else begin avs_s0_readdata = 0; end end always @(posedge csi_clk or posedge rsi_reset_n) begin // To write if (rsi_reset_n) begin START <= 0; DATA <= 0; end else if (avs_s0_write) begin case (avs_s0_address) 2'b00 : begin// START <= avs_s0_writedata; end 2'b01 : begin DATA <= avs_s0_writedata; end default : begin DATA <= 0; end endcase end end In my C ode, i am trying to write START register (as posted previously) and read back START register. Please suggest. I need to come out of this issue soon - Altera_Forum
Honored Contributor
--- Quote Start --- Hi, the code look like: always @(posedge csi_clk or posedge rsi_reset_n) begin // To read if (rsi_reset_n) begin end else if (avs_s0_read) begin avs_s0_readdata = START; end else begin avs_s0_readdata = 0; end end --- Quote End --- Its look like your code is correct. Still you can replace above code with this one always @(posedge csi_clk or posedge rsi_reset_n) begin // To read if (rsi_reset_n) begin avs_s0_readdata <= 0; end else begin case(avs_s0_address) 2'b00 : avs_s0_readdata <= START; default : avs_s0_readdata <= 0; endcase end end Apart from this what is the read and write latency of your Avalon interface.You can find it in your .tcl file.If write latency is zero then your write logic is correct and if your read latency is 1 then your read logic is correct. I have one doubt regarding reset.Is it active high or low? From the name of reset it looks like it is active low and you have used it as a active high. You can also find this from your .tcl file. Also make practice to use non blocking statement for sequential logic. Regards, Krupesh - Altera_Forum
Honored Contributor
Hi,
I am able to communicate with the custom component successfully. Now my final task is to calculate the no of clock cycles consumed by the custom component during the execution. I also included Signal Tap II in my design. But i don't know how to use that to calculate no of clock cycles. Please help. - Altera_Forum
Honored Contributor
You can use performance counter or interval timer provided by the Altera or
You can implement one counter inside your custom component and add one register to read its value. - Altera_Forum
Honored Contributor
I used performance counter, but not able to see anything on the console. Not even the stuff which I was getting before adding the performance counter.
I followed the steps below: 1. Added Performance counter in Qsys Design. 2. Added Timer. 3. Used: PERF_RESET(); PERF_START_MEASURING(); PERF_BEGIN(); // Here is the code block to be tested. // I want to know the cycles consumed during this block. PERF_END(); PERF_STOP_MEASURING(); perf_print_formatted_report(); Please help if i am missing anything in the process. - Altera_Forum
Honored Contributor
I have used performance counter long time ago.Its look like that you are doing the same thing. Here is my code
PERF_RESET(PERFORMANCE_COUNTER_0_BASE); PERF_START_MEASURING(PERFORMANCE_COUNTER_0_BASE); PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE,1); // Here is the code block to be tested. // I want to know the cycles consumed during this block. PERF_END(PERFORMANCE_COUNTER_0_BASE,1); int cycles = IORD(PERFORMANCE_COUNTER_0_BASE,4); //Read the value of counter.Note that offset is set to 4. If it is not working then your should design counter in your custom component and read it using avalon interface for the quick solution. - Altera_Forum
Honored Contributor
Thanks a lot zoomkrupesh, cronus10.
With all your help and guidance, I successfully implemented and tested my project. Regards, Anuj Agrawal - Altera_Forum
Honored Contributor
Hi Anuj,
Would you please share how did you find the solution? So that it will be helpful to other users as well. Thanks, Krupesh - Altera_Forum
Honored Contributor
For performance evaluation, I used the below template:
PERF_RESET(PERFORMANCE_COUNTER_0_BASE); PERF_START_MEASURING(PERFORMANCE_COUNTER_0_BASE); PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE,1); // Here is the code block to be tested. // I wanted to know the cycles consumed during this block. PERF_END(PERFORMANCE_COUNTER_0_BASE,1); PERF_STOP_MEASURING(PERFORMANCE_COUNTER_0_BASE); long time; time = perf_get_section_time(PERFORMANCE_COUNTER_0_BASE, 1); printf("\n\nTotal cycles consumed in FIR calculation = %ld cycles\n", time); This returns the no of clock cycles consumed. And by knowing the oscillator frequency, we can calcuate the total time consumed in the block. Thanks, Anuj