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Altera_Forum's avatar
Altera_Forum
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8 years ago

Problems downloading to NIOS II / Verification fails

Hello

I am trying to interface the SD RAM on a DE0 board to a NIOS II. I have carefully followed the steps required to set up the SD RAM controller to use the IS42S16400J. Unfortunately when I try and down load my .elf file to the NIOS II processor, I get the following output in the console (briefly!):

--- Quote Start ---

2 [main] bash 952 find_fast_cwd: WARNING: Couldn't compute FAST_CWD pointer. Please report this problem to

the public mailing list cygwin@cygwin.com

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

Resetting and pausing target processor: OK

Initializing CPU cache (if present)

OK

Downloading 00000000 ( 0%)

Downloading 000013D8 (99%)

Downloaded 5KB in 1.5s (3.3KB/s)

Verifying 00000000 ( 0%)

Verify failed between address 0x0 and 0x13CF

Leaving target processor paused

--- Quote End ---

I have searched various forums and seen that other people have had similar problems, but none of the solutions I found helped.

I have attached some screen shots of my setup. Could someone please give some hints as to what the issue is please?

Thanks in advance

Andrew

11 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi Andrew,

    Where .sdc file is located ? For your top module it should be in the root of your project.

    Does it contain the constraint for system clock ?

    BTW I didn't see top module (verilog or vhdl) that instantiate qsys. Where is it ?

    Anyway, if you state, that your device isn't supported by your version of Quartus, your compilation should fail, so no .sof file generated, and consequently nothing to flash.

    Hope, that you'll get answer from Altera support.

    Regards.