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Altera_Forum's avatar
Altera_Forum
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15 years ago

Problem with the baud rate

I'm studying NiosII these days, and I'm confused with the baud rate of the UART.

In the Altera's user guide, the relation among baud rate, frequency and divisor is given by

divisor=int(frequency/(baud rate)+0.5)...................(1)

baud rate=frequency/(divisor+1)...........................(2)

but according to (2),

divisor=frequency/(baud rate)-1, why is +0.5 in (1)?

Besides, int the simulation settings, there is an "accelerated" item, in the user guide, it's described as "accelerated (use divisor = 2)—TXD emits one bit per 2 clock cycles in simulation." But according to (2), TXD emits one bit per 3 clock cycles, what's the problem?

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Since frequency/baud_rate is generally a non integer number but divisor must be integer, the +0.5 trick gives you the best approximation of the required baud rate: i.e if decimal part <0.5 approximates to lower integer, while if >=0.5 approximates to upper one.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I can understand your meaning.

    But if that, the baud rate should equal to freq/dev instead of freq/(dev+1).
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    You are right. Probably there's an error in one of the formulas.

    Anyway you'd usually get only a small error, unless you want a high baudrate (>115200) with a low clock frequency (<50kHz)
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    The 'divisor + 1' could well be correct, on successive clock ticks the counter register could easily be: 2, 1, 0, divisor, divisor-1 (etc).

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    The 'divisor + 1' could well be correct, on successive clock ticks the counter register could easily be: 2, 1, 0, divisor, divisor-1 (etc).

    --- Quote End ---

    I agree this is what is usually done by all other processor I worked with: 'divisor' is always 1 unit less the real clock division, and this allows not wasting the zero value (or worse, making it an absurd value).

    Anyway, as giraffe remarked in the original post, the information in the manual is somehow inconsistent:

    The formula asserts you must use divisor=1 in order to get a baudrate=frequency/2. But the example regarding accelerated mode says you must use divisor=2.

    If anyone is using the uart module and would like to the test the actual baudrate coming out with divisor=2, please clarify which is the correct formula.
  • EClose's avatar
    EClose
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    4 years ago

    I used an oscilloscope to settle this. Equation (2) is correct, but equation (1) should be:

    divisor=int((frequency/baud rate)-0.5)

    As others noted, typically this won't make much of a difference unless your divisor is small (ie. less than 40). Note that NIOS SOPC builder incorrectly uses equation (1) with the + 0.5 so that your baud rate will be slower than ideal. I'm not sure if this has been corrected in later versions.