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Altera_Forum
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16 years ago

PIO set and clear bits

Hi! I am using a Nios II in my Cyclone II FPGA. I configured the Nios with a 18bit output-PIO. When i use the macro IOWR_ALTERA_AVALON_PIO_DATA() i can easily turn my leds on and off. Looking ...
Altera_Forum's avatar
Altera_Forum
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16 years ago

I never used this feature, anyway you can check system.h file. I think you should have this define: # define PIO_0_BIT_MODIFYING_OUTPUT_REGISTER 1

It would be 0 if individual set/clear is not enabled.

Enabling individual set/clear in sopc builder, generates two extra pio registers at offset 4 and 5.

You'll find complete (and more reliable than mine...) information in Nios reference handbook, vol 5, chapter 9

http://www.altera.com/literature/hb/nios2/n2cpu_nii51007.pdf

Cris