Forum Discussion
Pausing target processor: not responding.
when i try to run as NIOS II hardware, i am getting this error,
Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Pausing target processor: not responding. Resetting and trying again: FAILED Leaving target processor paused how can i correct it, Its running in the simulator though (NIOS instruction set simulator)17 Replies
- Altera_Forum
Honored Contributor
The compilation msgs shown are, as in attached file , it shows timing reqs not met
- Altera_Forum
Honored Contributor
It is possible that your processor is held in reset at the firmware level. Make sure your processor has a valid clock and that the reset polarity is correct.
- Altera_Forum
Honored Contributor
I agree with kosh271
Check resets connection (in top level, a lot of times the problem is there). - Altera_Forum
Honored Contributor
- Altera_Forum
Honored Contributor
kindly someone assist me
- Altera_Forum
Honored Contributor
The compilation messages indicate that you don't have the license for the Nios CPU. This means Quartus generates a time limited .sof file for evaluation purposes. When you configure the FPGA you will see an OpenCore window saying you are in evaluation mode. Do not close this window or the Nios CPU will stop working and you can get this "non responding" error.
- Altera_Forum
Honored Contributor
yes , i didnt closed the window , then also the same problem persists
- Altera_Forum
Honored Contributor
Did you modify the example in any way? Check epsecially the clock and reset input. The reset is active low so it must be high for the system to work. You can verify that the clock is running by using signaltap, either by monitoring the clock signal itself, or by using it as the clock in signaltap (it will say "waiting for clock" if the clock isn't toggling).
- Altera_Forum
Honored Contributor
what these lines show ?
Warning (10034): Output port "LEDR" at myfirst_niosii.v(44) has no driver Warning (10034): Output port "FL_ADDR" at myfirst_niosii.v(47) has no driver Warning (10034): Output port "FL_CE_N" at myfirst_niosii.v(48) has no driver Warning (10034): Output port "FL_OE_N" at myfirst_niosii.v(50) has no driver Warning (10034): Output port "FL_RST_N" at myfirst_niosii.v(51) has no driver Warning (10034): Output port "FL_WE_N" at myfirst_niosii.v(53) has no driver Warning (10034): Output port "FL_WP_N" at myfirst_niosii.v(54) has no driver - Altera_Forum
Honored Contributor
It means that you defined some output ports on your top level verilog file that you didn't connect to anything inside your design.