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Altera_Forum's avatar
Altera_Forum
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19 years ago

NiosII/f fitting into UP3 and the leading zero tut

Could you help me anyone for these questions?

I have two question here

Firstly,

Currently, I am following NiosII custom instruction tutorial 'the leading zero' one.

I am using UP3 board with EP1C6Q240C8 device and QuartusII software.

When I run the application I've got below error.

Does anybody know what problem is?

Could you help me out here, please?

**** Incremental build of configuration Release for project ci_tutorial_0_syslib ****

make -s all

Compiling alt_sys_init.c...

system_description/alt_sys_init.c: In function `alt_sys_init':

system_description/alt_sys_init.c:82: error: `SYS_CLK_TIMER_BASE' undeclared (first use in this function)

system_description/alt_sys_init.c:82: error: (Each undeclared identifier is reported only once

system_description/alt_sys_init.c:82: error: for each function it appears in.)

system_description/alt_sys_init.c:82: error: `HIGH_RES_TIMER_BASE' undeclared (first use in this function)

make: *** [obj/alt_sys_init.o] Error 1

Build completed

And the error line is below where * is :

void alt_sys_init( void )

{

* ALTERA_AVALON_TIMER_INIT( TIMER_0, timer_0 );

ALTERA_AVALON_JTAG_UART_INIT( JTAG_UART_0, jtag_uart_0 );

}

Hmm

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/dry.gif

another question is I was trying to generate NiosII/f system with the board that I&#39;ve got.

When I compile it from QuartusII software, I&#39;ve got fitting problem below :

Error: Selected device has 20 RAM location(s) of type M4K RAM. However, the current design needs more than 20 to successfully fit.

Error: Can&#39;t fit design in device

So I&#39;ve looked up data sheet, and it says

The Cyclone device consists of approximately 6000 Logic Element (exact number of LE : 5980)

and it offer 20 of M4K RAM Blocks (128 x 36 bits), and Maximum 185 of User I/Os.

Does this mean that I can&#39;t generate NiosII/f (Fast version) with the Cyclone device(EP1C6Q240C)?

How many M4K RAM Blocks do we need for each of NiosII family(economic, standard, fast)?

Anyone knows?

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    Well, the number of M4K-blocks depends largely on the cache size. Maybe if you reduce data- or instruction cache you can fit the design. Also have a look at the JTAG debug level for the NIOS, maybe you can save some blocks there, too.

    Regarding the other problem, do you have the two timers sys_clk_timer and high_res_timer in your design? Seems they are missing or maybe renamed or something.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    --- Quote Start ---

    originally posted by kalle leo@May 15 2006, 06:03 PM

    well, the number of m4k-blocks depends largely on the cache size. maybe if you reduce data- or instruction cache you can fit the design. also have a look at the jtag debug level for the nios, maybe you can save some blocks there, too.

    regarding the other problem, do you have the two timers sys_clk_timer and high_res_timer in your design? seems they are missing or maybe renamed or something.

    <div align='right'><{post_snapback}> (index.php?act=findpost&pid=15372)

    --- quote end ---

    --- Quote End ---

    I&#39;ve manage to generate Fast version of NiosII system with sram and only 1Kbyte Data cache/ 4Kbyte Instruction cache. Thanks for good advices.

    When I change to 2Kbyte Data cache, it didn&#39;t fit.

    But my question is when I looked up compilation report for the 1Kbyte data cache system, it use only less than 50% of LEs(logic elements). Then still have more than half of resources, how it can&#39;t generate 2Kbyte data cache system?

    Could you give me some more explaination, please?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    The cache is not implemented using Logic Elements but instead uses the RAM blocks. Take a look at the "Total Memory Bits" line in the compilation report summary. Also, in the Resource section of the fitter report there is information on how much memory bits or RAM blocks certain parts of the design are using.